Zig 0.17.0-dev (Split by item)

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detectNativeCpuAndFeatures

macos.detectNativeCpuAndFeatures
pub fn detectNativeCpuAndFeatures() ?Target.Cpu

File

Code

pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
    var cpu_family: std.c.CPUFAMILY = undefined;
    var len: usize = @sizeOf(std.c.CPUFAMILY);
    switch (posix.errno(posix.system.sysctlbyname("hw.cpufamily", &cpu_family, &len, null, 0))) {
        .SUCCESS => {},
        .FAULT => unreachable, // segmentation fault
        .PERM => unreachable, // only when setting values,
        .NOMEM => unreachable, // memory already on the stack
        .NOENT => unreachable, // constant, known good value
        else => unreachable,
    }

    const current_arch = builtin.cpu.arch;
    switch (current_arch) {
        .aarch64 => {
            const model = switch (cpu_family) {
                .ARM_CYCLONE => &Target.aarch64.cpu.apple_a7,
                .ARM_TYPHOON => &Target.aarch64.cpu.apple_a8,
                .ARM_TWISTER => &Target.aarch64.cpu.apple_a9,
                .ARM_HURRICANE => &Target.aarch64.cpu.apple_a10,
                .ARM_MONSOON_MISTRAL => &Target.aarch64.cpu.apple_a11,
                .ARM_VORTEX_TEMPEST => &Target.aarch64.cpu.apple_a12,
                .ARM_LIGHTNING_THUNDER => &Target.aarch64.cpu.apple_a13,
                .ARM_FIRESTORM_ICESTORM => &Target.aarch64.cpu.apple_a14,
                .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15,
                .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16,
                .ARM_IBIZA => &Target.aarch64.cpu.apple_m3, // base
                .ARM_PALMA => &Target.aarch64.cpu.apple_m3, // max
                .ARM_LOBOS => &Target.aarch64.cpu.apple_m3, // pro
                .ARM_COLL => &Target.aarch64.cpu.apple_a17, // pro
                .ARM_DONAN => &Target.aarch64.cpu.apple_m4, // base
                .ARM_BRAVA => &Target.aarch64.cpu.apple_m4, // pro/max
                .ARM_TAHITI => &Target.aarch64.cpu.apple_a18, // pro
                .ARM_TUPAI => &Target.aarch64.cpu.apple_a18, // base
                .ARM_HIDRA => &Target.aarch64.cpu.apple_m5, // base
                .ARM_SOTRA => &Target.aarch64.cpu.apple_m5, // pro/max
                .ARM_THERA => &Target.aarch64.cpu.apple_a19, // pro
                .ARM_TILOS => &Target.aarch64.cpu.apple_a19, // base
                else => return null,
            };

            return Target.Cpu{
                .arch = current_arch,
                .model = model,
                .features = model.features,
            };
        },
        else => {},
    }

    return null;
}