feature. See also
. The project being documented here (as the example) is the Zig library itself.
aarch64.Feature
pub const Feature = enum
File
Code
pub const Feature = enum {
a320,
addr_lsl_slow_14,
aes,
aggressive_fma,
aggressive_interleaving,
alternate_sextload_cvt_f32_pattern,
altnzcv,
alu_lsl_fast,
am,
amvs,
arith_bcc_fusion,
arith_cbz_fusion,
ascend_store_address,
avoid_ldapur,
balance_fp_ops,
bf16,
brbe,
bti,
btie,
call_saved_x10,
call_saved_x11,
call_saved_x12,
call_saved_x13,
call_saved_x14,
call_saved_x15,
call_saved_x18,
call_saved_x8,
call_saved_x9,
ccdp,
ccidx,
ccpp,
chk,
clrbhb,
cmh,
cmp_bcc_fusion,
cmpbr,
complxnum,
contextidr_el2,
cpa,
crc,
crypto,
cssc,
d128,
disable_fast_inc_vl,
disable_latency_sched_heuristic,
disable_ldp,
disable_maximize_scalable_bandwidth,
disable_stp,
disable_unpredicated_ld_st_lower,
dit,
dotprod,
ecv,
el2vmsa,
el3,
enable_select_opt,
ete,
execute_only,
exynos_cheap_as_move,
f16f32dot,
f16f32mm,
f16mm,
f32mm,
f64mm,
f8f16mm,
f8f32mm,
faminmax,
fgt,
fix_cortex_a53_835769,
flagm,
fmv,
force_32bit_jump_tables,
fp16fml,
fp8,
fp8dot2,
fp8dot4,
fp8fma,
fp_armv8,
fpac,
fprcvt,
fptoint,
fujitsu_monaka,
fullfp16,
fuse_address,
fuse_addsub_2reg_const1,
fuse_adrp_add,
fuse_aes,
fuse_arith_logic,
fuse_crypto_eor,
fuse_csel,
fuse_cset,
fuse_literals,
gcie,
gcs,
harden_sls_blr,
harden_sls_nocomdat,
harden_sls_retbr,
hbc,
hcx,
i8mm,
ite,
jsconv,
ldp_aligned_only,
lor,
ls64,
lscp,
lse,
lse128,
lse2,
lsfe,
lsui,
lut,
max_interleave_factor_4,
mec,
mops,
mops_go,
mpam,
mpamv2,
mte,
mtetc,
neon,
nmi,
no_bti_at_return_twice,
no_neg_immediates,
no_sve_fp_ld1r,
no_zcz_fpr64,
nv,
occmo,
olympus,
outline_atomics,
pan,
pan_rwv,
pauth,
pauth_lr,
pcdphint,
perfmon,
poe2,
pops,
predictable_select_expensive,
predres,
prfm_slc_target,
rand,
ras,
rasv2,
rcpc,
rcpc3,
rcpc_immo,
rdm,
reserve_lr_for_ra,
reserve_x1,
reserve_x10,
reserve_x11,
reserve_x12,
reserve_x13,
reserve_x14,
reserve_x15,
reserve_x18,
reserve_x2,
reserve_x20,
reserve_x21,
reserve_x22,
reserve_x23,
reserve_x24,
reserve_x25,
reserve_x26,
reserve_x27,
reserve_x28,
reserve_x3,
reserve_x4,
reserve_x5,
reserve_x6,
reserve_x7,
reserve_x9,
rme,
sb,
sel2,
sha2,
sha3,
slow_misaligned_128store,
slow_paired_128,
slow_strqro_store,
sm4,
sme,
sme2,
sme2p1,
sme2p2,
sme2p3,
sme_b16b16,
sme_f16f16,
sme_f64f64,
sme_f8f16,
sme_f8f32,
sme_fa64,
sme_i16i64,
sme_lutv2,
sme_mop4,
sme_tmop,
spe,
spe_eef,
specres2,
specrestrict,
ssbs,
ssve_aes,
ssve_bitperm,
ssve_fexpa,
ssve_fp8dot2,
ssve_fp8dot4,
ssve_fp8fma,
store_pair_suppress,
stp_aligned_only,
strict_align,
sve,
sve2,
sve2_aes,
sve2_bitperm,
sve2_sha3,
sve2_sm4,
sve2p1,
sve2p2,
sve2p3,
sve_aes,
sve_aes2,
sve_b16b16,
sve_b16mm,
sve_bfscale,
sve_bitperm,
sve_f16f32mm,
sve_sha3,
sve_sm4,
tagged_globals,
tev,
the,
tlb_rmi,
tlbid,
tlbiw,
tpidr_el1,
tpidr_el2,
tpidr_el3,
tpidrro_el0,
tracev8_4,
trbe,
uaops,
use_experimental_zeroing_pseudos,
use_fixed_over_scalable_if_equal_cost,
use_postra_scheduler,
use_reciprocal_square_root,
use_wzr_to_vec_move,
v8_1a,
v8_2a,
v8_3a,
v8_4a,
v8_5a,
v8_6a,
v8_7a,
v8_8a,
v8_9a,
v8a,
v8r,
v9_1a,
v9_2a,
v9_3a,
v9_4a,
v9_5a,
v9_6a,
v9_7a,
v9a,
vh,
wfxt,
xs,
zcm_fpr128,
zcm_fpr32,
zcm_fpr64,
zcm_gpr32,
zcm_gpr64,
zcz_fp_workaround,
zcz_fpr128,
zcz_gpr32,
zcz_gpr64,
}