Zig 0.17.0-dev (Split by item)

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toElfMachine

Target.toElfMachine
pub fn toElfMachine(target: *const Target) std.elf.EM

File

lib/std/Target.zig:1083

Code

pub fn toElfMachine(target: *const Target) std.elf.EM {
    return switch (target.cpu.arch) {
        .aarch64, .aarch64_be => .AARCH64,
        .alpha => .ALPHA,
        .amdgcn => .AMDGPU,
        .arc, .arceb => .ARC_COMPACT2,
        .arm, .armeb, .thumb, .thumbeb => .ARM,
        .avr => .AVR,
        .bpfeb, .bpfel => .BPF,
        .csky => .CSKY,
        .ez80 => .Z80,
        .hexagon => .QDSP6,
        .hppa, .hppa64 => .PARISC,
        .kalimba => .CSR_KALIMBA,
        .kvx => .KVX,
        .lanai => .LANAI,
        .loongarch32, .loongarch64 => .LOONGARCH,
        .m88k => .@"88K",
        .m68k => .@"68K",
        .microblaze, .microblazeel => .MICROBLAZE,
        .mips, .mips64, .mipsel, .mips64el => .MIPS,
        .msp430 => .MSP430,
        .or1k => .OR1K,
        .powerpc, .powerpcle => .PPC,
        .powerpc64, .powerpc64le => .PPC64,
        .propeller => .PROPELLER,
        .riscv32, .riscv32be, .riscv64, .riscv64be => .RISCV,
        .s390x => .S390,
        .sh, .sheb => .SH,
        .sparc => if (target.cpu.has(.sparc, .v9)) .SPARC32PLUS else .SPARC,
        .sparc64 => .SPARCV9,
        .ve => .VE,
        .x86_16, .x86 => .@"386",
        .x86_64 => .X86_64,
        .xcore => .XCORE,
        .xtensa, .xtensaeb => .XTENSA,

        .nvptx,
        .nvptx64,
        .spirv32,
        .spirv64,
        .wasm32,
        .wasm64,
        => .NONE,
    };
}