feature. See also
. The project being documented here (as the example) is the Zig library itself.
Target.cTypePreferredAlignment
pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16
File
Code
pub fn cTypePreferredAlignment(target: *const Target, c_type: CType) u16 {
switch (target.cpu.arch) {
.arc, .arceb => switch (c_type) {
.longdouble => return 4,
else => {},
},
.avr,
.ez80,
=> return 1,
.x86 => switch (target.os.tag) {
.windows, .uefi => switch (c_type) {
.longdouble => switch (target.abi) {
.gnu => return 4,
else => return 8,
},
else => {},
},
else => switch (c_type) {
.longdouble => return 4,
else => {},
},
},
.m68k => switch (c_type) {
.int, .uint, .long, .ulong => return 2,
else => {},
},
.wasm32, .wasm64 => switch (target.os.tag) {
.emscripten => switch (c_type) {
.longdouble => return 8,
else => {},
},
else => {},
},
else => {},
}
return @min(
std.math.ceilPowerOfTwoAssert(u16, (cTypeBitSize(target, c_type) + 7) / 8),
@as(u16, switch (target.cpu.arch) {
.x86_16,
.msp430,
=> 2,
.arc,
.arceb,
.csky,
.kalimba,
.microblaze,
.microblazeel,
.or1k,
.propeller,
.sh,
.sheb,
.xcore,
.xtensa,
.xtensaeb,
=> 4,
.amdgcn,
.arm,
.armeb,
.bpfeb,
.bpfel,
.hexagon,
.hppa,
.lanai,
.m68k,
.m88k,
.mips,
.mipsel,
.nvptx,
.nvptx64,
.s390x,
.sparc,
.thumb,
.thumbeb,
.x86,
=> 8,
.aarch64,
.aarch64_be,
.alpha,
.hppa64,
.kvx,
.loongarch32,
.loongarch64,
.mips64,
.mips64el,
.powerpc,
.powerpcle,
.powerpc64,
.powerpc64le,
.riscv32,
.riscv32be,
.riscv64,
.riscv64be,
.sparc64,
.spirv32,
.spirv64,
.ve,
.wasm32,
.wasm64,
.x86_64,
=> 16,
.avr,
.ez80,
=> unreachable,
}),
);
}