pub const VaList = switch (builtin.cpu.arch) {
.amdgcn,
.msp430,
.nvptx,
.nvptx64,
.powerpc64,
.powerpc64le,
.x86,
=> *u8,
.arc,
.arceb,
.avr,
.bpfel,
.bpfeb,
.csky,
.hppa,
.hppa64,
.kvx,
.lanai,
.loongarch32,
.loongarch64,
.m68k,
.microblaze,
.microblazeel,
.mips,
.mipsel,
.mips64,
.mips64el,
.riscv32,
.riscv32be,
.riscv64,
.riscv64be,
.sparc,
.sparc64,
.spirv32,
.spirv64,
.ve,
.wasm32,
.wasm64,
.xcore,
=> *anyopaque,
.aarch64, .aarch64_be => switch (builtin.os.tag) {
.driverkit, .ios, .maccatalyst, .macos, .tvos, .visionos, .watchos, .windows => *u8,
else => switch (builtin.zig_backend) {
else => VaListAarch64,
.stage2_llvm => @compileError("disabled due to miscompilations"),
},
},
.alpha => VaListAlpha,
.arm, .armeb, .thumb, .thumbeb => VaListArm,
.hexagon => if (builtin.target.abi.isMusl()) VaListHexagon else *u8,
.powerpc, .powerpcle => VaListPowerPc,
.s390x => VaListS390x,
.sh, .sheb => VaListSh, // This is wrong for `sh_renesas`: https://github.com/ziglang/zig/issues/24692#issuecomment-3150779829
.x86_64 => switch (builtin.os.tag) {
.uefi, .windows => switch (builtin.zig_backend) {
else => *u8,
.stage2_llvm => @compileError("disabled due to miscompilations"),
},
else => VaListX86_64,
},
.xtensa, .xtensaeb => VaListXtensa,
else => @compileError("VaList not supported for this target yet"),
}
This data structure is used by the Zig language code generation and therefore must be kept in sync with the compiler implementation.