Arm

const Arm = struct {
    /// The numbered general-purpose registers R0 - R15.
    r: [16]Gpr,

    pub const Gpr = u32;

    pub inline fn current() Arm {
        var ctx: Arm = undefined;
        asm volatile (
            \\ // For compatibility with Thumb, we can't write r13 (sp) or r15 (pc) with stm.
            \\ stm r0, {r0-r12}
            \\ str r13, [r0, #0x34]
            \\ str r14, [r0, #0x38]
            \\ mov r1, pc
            \\ str r1, [r0, #0x3c]
            :
            : [r] "{r0}" (&ctx.r),
            : .{ .r1 = true, .memory = true });
        return ctx;
    }

    pub fn getFp(ctx: *const Arm) usize {
        return ctx.r[11];
    }
    pub fn getPc(ctx: *const Arm) usize {
        return ctx.r[15];
    }

    pub fn dwarfRegisterBytes(ctx: *Arm, register_num: u16) DwarfRegisterError![]u8 {
        // DWARF for the Arm(r) Architecture § 4.1 "DWARF register names"
        switch (register_num) {
            0...15 => return @ptrCast(&ctx.r[register_num]),

            64...95 => return error.UnsupportedRegister, // S0 - S31
            96...103 => return error.UnsupportedRegister, // F0 - F7
            104...111 => return error.UnsupportedRegister, // wCGR0 - wCGR7, or ACC0 - ACC7
            112...127 => return error.UnsupportedRegister, // wR0 - wR15
            128 => return error.UnsupportedRegister, // SPSR
            129 => return error.UnsupportedRegister, // SPSR_FIQ
            130 => return error.UnsupportedRegister, // SPSR_IRQ
            131 => return error.UnsupportedRegister, // SPSR_ABT
            132 => return error.UnsupportedRegister, // SPSR_UND
            133 => return error.UnsupportedRegister, // SPSR_SVC
            134...142 => return error.UnsupportedRegister, // Reserved
            143 => return error.UnsupportedRegister, // RA_AUTH_CODE
            144...150 => return error.UnsupportedRegister, // R8_USR - R14_USR
            151...157 => return error.UnsupportedRegister, // R8_FIQ - R14_FIQ
            158...159 => return error.UnsupportedRegister, // R13_IRQ - R14_IRQ
            160...161 => return error.UnsupportedRegister, // R13_ABT - R14_ABT
            162...163 => return error.UnsupportedRegister, // R13_UND - R14_UND
            164...165 => return error.UnsupportedRegister, // R13_SVC - R14_SVC
            166...191 => return error.UnsupportedRegister, // Reserved
            192...199 => return error.UnsupportedRegister, // wC0 - wC7
            200...255 => return error.UnsupportedRegister, // Reserved
            256...287 => return error.UnsupportedRegister, // D0 - D31
            288...319 => return error.UnsupportedRegister, // Reserved for FP/NEON
            320 => return error.UnsupportedRegister, // TPIDRURO
            321 => return error.UnsupportedRegister, // TPIDRURW
            322 => return error.UnsupportedRegister, // TPIDPR
            323 => return error.UnsupportedRegister, // HTPIDPR
            324...8191 => return error.UnsupportedRegister, // Reserved
            8192...16383 => return error.UnsupportedRegister, // Unspecified vendor co-processor register

            else => return error.InvalidRegister,
        }
    }
}