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constsupports_atomic_ops = switch (arch) {
.msp430, .avr, .bpfel, .bpfeb => false,
.arm, .armeb, .thumb, .thumbeb =>
// The ARM v6m ISA has no ldrex/strex and so it's impossible to do CAS
// operations (unless we're targeting Linux, the kernel provides a way to
// perform CAS operations).
// XXX: The Linux code path is not implemented yet.
!builtin.cpu.has(.arm, .has_v6m),
else => true,
}