fn __aarch64_swp2_rel() align(16) callconv(.naked) void
fn __aarch64_swp2_rel() align(16) callconv(.naked) void { @setRuntimeSafety(false); asm volatile ( \\ cbz w16, 8f \\ .inst 0x38208020 + 0x40000000 + 0x400000 \\ ret \\8: \\ mov w16, w0 \\0: \\ ldxrh w0, [x1] \\ stlxrh w17, w16, [x1] \\ cbnz w17, 0b \\1: \\ ret : : [__aarch64_have_lse_atomics] "{w16}" (__aarch64_have_lse_atomics), : .{ .w15 = true, .w16 = true, .w17 = true, .memory = true }); unreachable; }