fn __aarch64_ldadd8_acq() align(16) callconv(.naked) void
fn __aarch64_ldadd8_acq() align(16) callconv(.naked) void { @setRuntimeSafety(false); asm volatile ( \\ cbz w16, 8f \\ .inst 0x38200020 + 0x0000 + 0xc0000000 + 0x800000 \\ ret \\8: \\ mov x16, x0 \\0: \\ ldaxr x0, [x1] \\ add x17, x0, x16 \\ stxr w15, x17, [x1] \\ cbnz w15, 0b \\1: \\ ret : : [__aarch64_have_lse_atomics] "{w16}" (__aarch64_have_lse_atomics), : .{ .w15 = true, .w16 = true, .w17 = true, .memory = true }); unreachable; }