FILE

    pub const FILE = struct {
        /// Machine Types
        /// The Machine field has one of the following values, which specify the CPU type.
        /// An image file can be run only on the specified machine or on a system that emulates the specified machine.
        pub const MACHINE = enum(u16) {
            /// The content of this field is assumed to be applicable to any machine type
            UNKNOWN = 0x0,
            /// Alpha AXP, 32-bit address space
            ALPHA = 0x184,
            /// Alpha 64, 64-bit address space
            ALPHA64 = 0x284,
            /// Matsushita AM33
            AM33 = 0x1d3,
            /// x64
            AMD64 = 0x8664,
            /// ARM little endian
            ARM = 0x1c0,
            /// ARM64 little endian
            ARM64 = 0xaa64,
            /// ABI that enables interoperability between native ARM64 and emulated x64 code.
            ARM64EC = 0xA641,
            /// Binary format that allows both native ARM64 and ARM64EC code to coexist in the same file.
            ARM64X = 0xA64E,
            /// ARM Thumb-2 little endian
            ARMNT = 0x1c4,
            /// EFI byte code
            EBC = 0xebc,
            /// Intel 386 or later processors and compatible processors
            I386 = 0x14c,
            /// Intel Itanium processor family
            IA64 = 0x200,
            /// LoongArch 32-bit processor family
            LOONGARCH32 = 0x6232,
            /// LoongArch 64-bit processor family
            LOONGARCH64 = 0x6264,
            /// Mitsubishi M32R little endian
            M32R = 0x9041,
            /// MIPS16
            MIPS16 = 0x266,
            /// MIPS with FPU
            MIPSFPU = 0x366,
            /// MIPS16 with FPU
            MIPSFPU16 = 0x466,
            /// Power PC little endian
            POWERPC = 0x1f0,
            /// Power PC with floating point support
            POWERPCFP = 0x1f1,
            /// MIPS I compatible 32-bit big endian
            R3000BE = 0x160,
            /// MIPS I compatible 32-bit little endian
            R3000 = 0x162,
            /// MIPS III compatible 64-bit little endian
            R4000 = 0x166,
            /// MIPS IV compatible 64-bit little endian
            R10000 = 0x168,
            /// RISC-V 32-bit address space
            RISCV32 = 0x5032,
            /// RISC-V 64-bit address space
            RISCV64 = 0x5064,
            /// RISC-V 128-bit address space
            RISCV128 = 0x5128,
            /// Hitachi SH3
            SH3 = 0x1a2,
            /// Hitachi SH3 DSP
            SH3DSP = 0x1a3,
            /// Hitachi SH4
            SH4 = 0x1a6,
            /// Hitachi SH5
            SH5 = 0x1a8,
            /// Thumb
            THUMB = 0x1c2,
            /// MIPS little-endian WCE v2
            WCEMIPSV2 = 0x169,
            _,
            /// AXP 64 (Same as Alpha 64)
            pub const AXP64: IMAGE.FILE.MACHINE = .ALPHA64;

            pub fn RelocationType(comptime machine: IMAGE.FILE.MACHINE) type {
                return switch (machine) {
                    .AMD64,
                    => REL.AMD64,
                    .ARM,
                    .ARMNT,
                    => REL.ARM,
                    .ARM64,
                    .ARM64EC,
                    .ARM64X,
                    => REL.ARM64,
                    .I386 => REL.I386,
                    .IA64 => REL.IA64,
                    .M32R => REL.M32R,
                    .MIPS16,
                    .MIPSFPU,
                    .MIPSFPU16,
                    => REL.MIPS,
                    .POWERPC,
                    .POWERPCFP,
                    => REL.PPC,
                    .SH3,
                    .SH3DSP,
                    .SH4,
                    .SH5,
                    => REL.SH,
                    else => void,
                };
            }
        };
    }