pub const all_features = blk: {
const len = @typeInfo(Feature).@"enum".field_names.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
result[@backingInt(Feature.abs2008)] = .{
.llvm_name = "abs2008",
.description = "Disable IEEE 754-2008 abs.fmt mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.cnmips)] = .{
.llvm_name = "cnmips",
.description = "Octeon cnMIPS Support",
.dependencies = featureSet(&[_]Feature{
.mips64r2,
}),
};
result[@backingInt(Feature.cnmipsp)] = .{
.llvm_name = "cnmipsp",
.description = "Octeon+ cnMIPS Support",
.dependencies = featureSet(&[_]Feature{
.cnmips,
}),
};
result[@backingInt(Feature.crc)] = .{
.llvm_name = "crc",
.description = "Mips R6 CRC ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.dsp)] = .{
.llvm_name = "dsp",
.description = "Mips DSP ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.dspr2)] = .{
.llvm_name = "dspr2",
.description = "Mips DSP-R2 ASE",
.dependencies = featureSet(&[_]Feature{
.dsp,
}),
};
result[@backingInt(Feature.dspr3)] = .{
.llvm_name = "dspr3",
.description = "Mips DSP-R3 ASE",
.dependencies = featureSet(&[_]Feature{
.dspr2,
}),
};
result[@backingInt(Feature.eva)] = .{
.llvm_name = "eva",
.description = "Mips EVA ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.fp64)] = .{
.llvm_name = "fp64",
.description = "Support 64-bit FP registers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.fpxx)] = .{
.llvm_name = "fpxx",
.description = "Support for FPXX",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.ginv)] = .{
.llvm_name = "ginv",
.description = "Mips Global Invalidate ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.gp64)] = .{
.llvm_name = "gp64",
.description = "General Purpose Registers are 64-bit wide",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.i6400)] = .{
.llvm_name = "i6400",
.description = "MIPS I6400 Processor",
.dependencies = featureSet(&[_]Feature{
.mips64r6,
.msa,
}),
};
result[@backingInt(Feature.i6500)] = .{
.llvm_name = "i6500",
.description = "MIPS I6500 Processor",
.dependencies = featureSet(&[_]Feature{
.mips64r6,
.msa,
}),
};
result[@backingInt(Feature.long_calls)] = .{
.llvm_name = "long-calls",
.description = "Disable use of the jal instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.micromips)] = .{
.llvm_name = "micromips",
.description = "microMips mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips1)] = .{
.llvm_name = "mips1",
.description = "Mips I ISA Support [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips16)] = .{
.llvm_name = "mips16",
.description = "Mips16 mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips2)] = .{
.llvm_name = "mips2",
.description = "Mips II ISA Support [highly experimental]",
.dependencies = featureSet(&[_]Feature{
.mips1,
}),
};
result[@backingInt(Feature.mips3)] = .{
.llvm_name = "mips3",
.description = "MIPS III ISA Support [highly experimental]",
.dependencies = featureSet(&[_]Feature{
.fp64,
.gp64,
.mips2,
.mips3_32,
.mips3_32r2,
}),
};
result[@backingInt(Feature.mips32)] = .{
.llvm_name = "mips32",
.description = "Mips32 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips2,
.mips3_32,
.mips4_32,
}),
};
result[@backingInt(Feature.mips32r2)] = .{
.llvm_name = "mips32r2",
.description = "Mips32r2 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32,
.mips3_32r2,
.mips4_32r2,
.mips5_32r2,
}),
};
result[@backingInt(Feature.mips32r3)] = .{
.llvm_name = "mips32r3",
.description = "Mips32r3 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32r2,
}),
};
result[@backingInt(Feature.mips32r5)] = .{
.llvm_name = "mips32r5",
.description = "Mips32r5 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32r3,
}),
};
result[@backingInt(Feature.mips32r6)] = .{
.llvm_name = "mips32r6",
.description = "Mips32r6 ISA Support [experimental]",
.dependencies = featureSet(&[_]Feature{
.abs2008,
.fp64,
.mips32r5,
.nan2008,
}),
};
result[@backingInt(Feature.mips3_32)] = .{
.llvm_name = "mips3_32",
.description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips3_32r2)] = .{
.llvm_name = "mips3_32r2",
.description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips3d)] = .{
.llvm_name = "mips3d",
.description = "Mips 3D ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips4)] = .{
.llvm_name = "mips4",
.description = "MIPS IV ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips3,
.mips4_32,
.mips4_32r2,
}),
};
result[@backingInt(Feature.mips4_32)] = .{
.llvm_name = "mips4_32",
.description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips4_32r2)] = .{
.llvm_name = "mips4_32r2",
.description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips5)] = .{
.llvm_name = "mips5",
.description = "MIPS V ISA Support [highly experimental]",
.dependencies = featureSet(&[_]Feature{
.mips4,
.mips5_32r2,
}),
};
result[@backingInt(Feature.mips5_32r2)] = .{
.llvm_name = "mips5_32r2",
.description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mips64)] = .{
.llvm_name = "mips64",
.description = "Mips64 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32,
.mips5,
}),
};
result[@backingInt(Feature.mips64r2)] = .{
.llvm_name = "mips64r2",
.description = "Mips64r2 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32r2,
.mips64,
}),
};
result[@backingInt(Feature.mips64r3)] = .{
.llvm_name = "mips64r3",
.description = "Mips64r3 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32r3,
.mips64r2,
}),
};
result[@backingInt(Feature.mips64r5)] = .{
.llvm_name = "mips64r5",
.description = "Mips64r5 ISA Support",
.dependencies = featureSet(&[_]Feature{
.mips32r5,
.mips64r3,
}),
};
result[@backingInt(Feature.mips64r6)] = .{
.llvm_name = "mips64r6",
.description = "Mips64r6 ISA Support [experimental]",
.dependencies = featureSet(&[_]Feature{
.mips32r6,
.mips64r5,
}),
};
result[@backingInt(Feature.msa)] = .{
.llvm_name = "msa",
.description = "Mips MSA ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.mt)] = .{
.llvm_name = "mt",
.description = "Mips MT ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.nan2008)] = .{
.llvm_name = "nan2008",
.description = "IEEE 754-2008 NaN encoding",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.noabicalls)] = .{
.llvm_name = "noabicalls",
.description = "Disable SVR4-style position-independent code",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.nomadd4)] = .{
.llvm_name = "nomadd4",
.description = "Disable 4-operand madd.fmt and related instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.nooddspreg)] = .{
.llvm_name = "nooddspreg",
.description = "Disable odd numbered single-precision registers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.notraps)] = .{
.llvm_name = null,
.description = "Disable trap instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.p5600)] = .{
.llvm_name = "p5600",
.description = "The P5600 Processor",
.dependencies = featureSet(&[_]Feature{
.mips32r5,
}),
};
result[@backingInt(Feature.ptr64)] = .{
.llvm_name = "ptr64",
.description = "Pointers are 64-bit wide",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.single_float)] = .{
.llvm_name = "single-float",
.description = "Only supports single precision float",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.soft_float)] = .{
.llvm_name = "soft-float",
.description = "Does not support floating point instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.strict_align)] = .{
.llvm_name = "strict-align",
.description = "Disable unaligned load store for r6",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.sym32)] = .{
.llvm_name = "sym32",
.description = "Symbols are 32 bit on Mips64",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.use_compact_branches)] = .{
.llvm_name = "use-compact-branches",
.description = "Use compact branch instructions for MIPS32R6/MIPS64R6",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.use_indirect_jump_hazard)] = .{
.llvm_name = "use-indirect-jump-hazard",
.description = "Use indirect jump guards to prevent certain speculation based attacks",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.use_tcc_in_div)] = .{
.llvm_name = "use-tcc-in-div",
.description = "Force the assembler to use trapping",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.vfpu)] = .{
.llvm_name = "vfpu",
.description = "Enable vector FPU instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.virt)] = .{
.llvm_name = "virt",
.description = "Mips Virtualization ASE",
.dependencies = featureSet(&[_]Feature{}),
};
result[@backingInt(Feature.xgot)] = .{
.llvm_name = "xgot",
.description = "Assume 32-bit GOT",
.dependencies = featureSet(&[_]Feature{}),
};
const ti = @typeInfo(Feature);
for (&result, 0..) |*elem, i| {
elem.index = i;
elem.name = ti.@"enum".field_names[i];
}
break :blk result;
}
